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Texas Instruments confirms there may be a problem with Ulticontroller's v2.1 design

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On the TI site, I found that someone named Patrick Olma (someone from Ultimaker, I presume?) posted the following question:

https://e2e.ti.com/...rface/f/390/t/495210

Looking at the date, I also assume that his question was posted after I flagged it in this forum.

This was the message:

 

Patrick Olma, Mar 3, 2016 3:49 PM:

Hello,

We are using the device PCA9306 as i2c level shifter to communicate between a 3,3V Master and a 5V Slave. Both sides of the SCL and SDA Pins were pulled up to VREF1 / VREF2 by using 1,8k resistors.

Unfortunately we mixed the VREF pins - so the 3,3V Master is connected to VREF2 and the 5V Slave is connected to VREF1.

Most of the time the device as well as the i2c communication works well, but under some circumstances, the device gets damaged.

Could the wrong connection of the VREF pins be the reason for this?

Best Regards,

 

The response from the TI employee is rather interesting:

 

Response from Rajan Arora, TI Employee Mar 3, 2016 4:25 PM

If VREF1 (5V) is larger than VREF2 (3.3V) then the VREF1 pin can be tied to the Enable pin, and pulled up to 5 V using 200kohm resistor. The EN pin should be tied to the larger voltage supply. Is this a possibility?

You are seeing damages on the device in the configuration because the terminal voltages on the transistor are exceeding 5.5V which is the recommended max on the terminals. This can result in extra leakage current. Can you list under what circumstances you see the damage (high temperature)?

So to summarize the damage is due to the incorrect connection. if possible I recommend changing the connection on the board to match the datasheet, or tie the EN pin to the VREF1 pin.

 

I guess I will try to jumper EN to VREF1 then, if possible at all. I am expecting some clarification from Ultimaker though...

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Guys please, before you start damaging your printer boards use some bit of caution. Patrick Olma works at Seprotronic GmbH in Germany which does not have any ties with Ultimaker.

I don't say it couldn't be related, but you shouldn't take such potentially dangerous steps based on vague information.

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Cohen from the Ultimaker team has confirmed the chip is not connected as suggested by the datasheet, and that he will correct this in the new revision he is working on.

Although the chip does bidirectional level translation, it apparently matters what you define as VREF1 and VREF2, since it matters what you connect the EN pin to. Texas Instruments' reply clearly states that the EN pin should be connected (via the 200kOhm resistor) to the HIGHER voltage reference. In the case of the Ulticontroller v2.1, this is the 5V pin, while now it is connected to the 3.3V pin.

And although indeed this would not normally cause problems, the fact is that the U3 chip on the Ulticontroller should be wired differently.

When I posted this message, I was just wondering if Patrick Olma may have been from Ultimaker, partly because of the timing of his inquiry and the timing of my first post on this forum about the schematic discrepancy for U3 with the datasheet, the similarity of his problem with mine, and partly because of his Dutch sounding name... Looking more closely at his post however, I should have realized that his design did not correspond to the Ulticontroller design... So, my assumption was wrong, and I apologize for this.

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