Hey no problem. I just wanted to warn people about acting too quickly on assumptions. You've had a few cases where the board fried and you'll agree that it sucks big time. I didn't know that Cohen already confirmed it.
Hey no problem. I just wanted to warn people about acting too quickly on assumptions. You've had a few cases where the board fried and you'll agree that it sucks big time. I didn't know that Cohen already confirmed it.
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umagi 8
Cohen from the Ultimaker team has confirmed the chip is not connected as suggested by the datasheet, and that he will correct this in the new revision he is working on.
Although the chip does bidirectional level translation, it apparently matters what you define as VREF1 and VREF2, since it matters what you connect the EN pin to. Texas Instruments' reply clearly states that the EN pin should be connected (via the 200kOhm resistor) to the HIGHER voltage reference. In the case of the Ulticontroller v2.1, this is the 5V pin, while now it is connected to the 3.3V pin.
And although indeed this would not normally cause problems, the fact is that the U3 chip on the Ulticontroller should be wired differently.
When I posted this message, I was just wondering if Patrick Olma may have been from Ultimaker, partly because of the timing of his inquiry and the timing of my first post on this forum about the schematic discrepancy for U3 with the datasheet, the similarity of his problem with mine, and partly because of his Dutch sounding name... Looking more closely at his post however, I should have realized that his design did not correspond to the Ulticontroller design... So, my assumption was wrong, and I apologize for this.
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